RISC-V Coprocessor of the nRF54L Series

Webinar | March 5, 2026 | 9 AM CET / 4 PM CST ASIA & 6 PM CET / 9 AM PDT / 12 PM EDT

05
Mar
2026
05
Mar
2026
Webinar

In this webinar, we will introduce the RISC-V coprocessor of the nRF54L Series.

The RISC-V coprocessor follows an open standard Instruction Set Architecture, based on the RISC principle. It’s gaining a lot of traction in the industry thanks to its modular and license free approach.

We will discuss how it’s implemented in the nRF54L Series, and what are the best use cases, so use it and get the most of it in your projects and designs.

Agenda

  • What is RISC-V?
  • The RISC-V Coprocessor of the nRF54L Series
  • Use cases
  • Demos
  • Q&A

 

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